Memory devices are generally used for storing digital values, for example results of calculations. Examples of such memory elements are so-called latches, such a latch being able to store a 1-bit value, that is to say one of two possible states. A further example are flip-flops which, for example, can be built up from latches. A value to be stored can be written to such memory elements.
For correctly writing values into such memory devices, timing requirements must be usually observed. In particular, so-called setup and hold times must be maintained. This essentially means that a value to be written must be present a certain time before (setup time) and a certain time after (hold time) a writing time, wherein the writing time can be determined, for example, by a clock signal, an activation signal or the like. In the case of a timing violation, it may happen that the memory device assumes a metastable state. If, for example, a logical 0 is defined by ground and a logical 1 by a positive supply voltage VDD, the metastable state can be approximately VDD/2. In a memory device such as a latch this metastable state then changes into a stable state (zero or one) after an undefined (i.e. unknown) time. This undetermined time is also called recovery time.
If subsequent circuit elements which use the stored value read the value out of the memory device during the metastable state, it is essentially randomly interpreted as a 0 or a 1 which leads to an unpredictable behaviour of such subsequent circuit parts (for example a logic). It is desirable, therefore, to avoid or to recognize such metastable states if possible.
From U.S. Pat. No. 5,789,945, a latch is known in which the abovementioned recovery time is shortened with the presence of a metastable state. However, it is not predictable here when the system will assume a stable state and it is still possible that subsequent circuit parts operate on the basis of the metastable state.
Other memory devices are known from U.S. Pat. No. 7,965,119 B2, US 2014/0211893 A1, U.S. Pat. No. 8,552,779 B2, U.S. Pat. No. 7,880,506 B2, U.S. Pat. No. 6,906,555 B2 or U.S. Pat. No. 6,498,513 B1.
It is an object, therefore, to provide memory devices by means of which a subsequent processing of stored values can be improved with regard to metastable states.